Photolithography – Pattern Transfer in Semiconductor Fabrication
Photolithography is a critical process in semiconductor manufacturing used to define micro- and nano-scale patterns on a wafer surface. It enables the transfer of complex circuit layouts from a mask (reticle) onto a wafer, forming the foundation for transistors, interconnects, and other integrated circuit (IC) features.
Photolithography is the heart of modern chip fabrication, enabling shrinking feature sizes, multi-layer stacking, and precise alignment, especially for sub-7nm and EUV (Extreme Ultraviolet) nodes.
Process Overview:
The photolithography process involves several precise steps:
Wafer Cleaning:
- Removes particles, organic contaminants, and moisture using wet or dry cleaning.
Photoresist Coating (Spin Coating):
- A thin, uniform layer of photoresist (light-sensitive polymer) is applied via spin coating.
- Thickness typically ranges from 100 nm to 2 µm, depending on the feature size.
Soft Bake (Pre-bake):
- Evaporates solvents from the resist layer to enhance adhesion and stability.
Mask Alignment & Exposure:
- A photomask containing the desired pattern is aligned over the wafer.
- Light (typically UV or EUV) is projected through the mask, exposing the photoresist.
Positive resist: Exposed regions become soluble.
Negative resist: Exposed regions become cross-linked and insoluble.
Development:
- The wafer is immersed in a developer solution that removes the soluble regions of photoresist.
- The remaining pattern now acts as a mask for etching or deposition.
Post-Exposure Bake (PEB):
- Enhances image resolution and reduces standing wave effects.
Etching or Implantation:
- Transfers the pattern into the underlying material through dry etching, wet etching, or ion implantation.
Resist Strip (Ashing):
- Removes the remaining photoresist after pattern transfer using oxygen plasma or solvents.
Types of Photolithography Technologies:
DUV (Deep Ultraviolet Lithography):
- 193 nm ArF lasers used in most advanced nodes.
EUV (Extreme Ultraviolet Lithography):
- 13.5 nm wavelength, enables sub-7nm patterning with fewer masks.
i-line/g-line Lithography:
- Used in older technologies (365/436 nm) for MEMS and analog ICs.
Stepper/Scanner Systems:
- Advanced projection systems used for high-resolution, repeatable patterning.
Key Parameters & Challenges:
- Resolution (R) ∝ λ / NA: Limited by wavelength (λ) and numerical aperture (NA)
- Overlay Accuracy: Essential for multi-layer alignment in CMOS
- Depth of Focus (DOF): Affects image sharpness across wafer topography
- Line Edge Roughness (LER): and CD Uniformity (Critical Dimension control)
- Photoresist profile: and chemical stability during etch
Applications:
Fabrication of:
- Transistors (CMOS, FinFET, GAAFET, CFET)
- Interconnect layers (metal/dielectric patterning)
- Passive components (capacitors, inductors, MEMS)
- Photonic and quantum devices
Used in:
- Logic and memory ICs
- Display backplanes (TFTs)
- Sensors and biomedical devices
Our Photolithography Services:
We offer full-cycle support for the photolithography process, including:
- Cleanroom photolithography process development
- Spin coating optimization for resist thickness and uniformity
- High-resolution mask design and layout preparation
- Optical proximity correction (OPC) and resolution enhancement techniques (RET)
- Etch process integration and post-litho clean steps
- TCAD and process simulation for CD and profile prediction
- Training and tool setup for i-line, DUV, or EUV lithography